On Designing and Reconfiguring k-Fault-Tolerant Tree Architectures
IEEE Transactions on Computers
Introduction to algorithms
Designing fault-tolerant systems using automorphisms
Journal of Parallel and Distributed Computing
Some Practical Issues in the Design of Fault-Tolerant Multiprocessors
IEEE Transactions on Computers - Special issue on fault-tolerant computing
Computing in the RAIN: A Reliable Array of Independent Nodes
IEEE Transactions on Parallel and Distributed Systems
Distributed Algorithms
Fault-Tolerant Meshes and Hypercubes with Minimal Numbers of Spares
IEEE Transactions on Computers
Connective Fault Tolerance in Multiple-Bus Systems
IEEE Transactions on Parallel and Distributed Systems
Tolerant Switched Local Area Networks
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
A Graph Model for Fault-Tolerant Computing Systems
IEEE Transactions on Computers
Dynamically Scaling Computer Networks
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
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A small number of network components failures can cause high-speed local area networks (LANs) or System Area Networks (SANs) to be partitioned. This issue has been resolved with the introduction of redundant network components (i.e., interfaces) into the network. A cost effective solution can be achieved with switch interconnects. Recently, such networks have been successfully implemented [6] with Myrinet networks.In this article, we present a "F cycle ring" (FCR) architecture which can withstand up to (F+1) failures without partitioning the switch interconnect. Our simple design is scalable to any ring size, given a lower limit on the number of switches. We focus on switches with a degree of four and computation nodes of degree two. We prove that (F+1) failures can be tolerated by the interconnect with several lemmas. Some examples of FCR are shown as an implementation of a full FCR network.