Power Consumption Estimation of a C Program for Data-Intensive Applications

  • Authors:
  • Eric Senn;Nathalie Julien;Johann Laurent;Eric Martin

  • Affiliations:
  • -;-;-;-

  • Venue:
  • PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
  • Year:
  • 2002

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Abstract

A method for estimating the power consumption of an algorithm is presented. The estimation can be performed both from the C program and from the assembly code. It relies on a power model for the targeted processor. Without compilation, several targets can be compared at the C-level in order to rapidly explore the design space. The estimation can be refined afterwards at the assembly level to allow further code optimizations. The power model of the Texas Instrument TMS320C6201 is presentedas a case study. Estimations are performed on real-life digital signal processing applications with average errors of 4.2 % at the C-level, and 1.8 % at the assembly level.