Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Low-power digital systems based on adiabatic-switching principles
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Design and Evaluation of Adiabatic Arithmetic Units
Analog Integrated Circuits and Signal Processing - Special issue: analog design issues in digital VSLI circuits and systems
Single-phase source-coupled adiabatic logic
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
True single-phase adiabatic circuitry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
A Regular Layout for Parallel Adders
IEEE Transactions on Computers
Ultralow-power adiabatic circuit semi-custom design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
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Adiabatic circuits are usually designed with methodologies optimized for the application in which they are used. In this work we show how a conventional design-flow based on an adiabatic standard-cell library and semi-automatic tools allow the quick and easy design and verification of a complex adiabatic system, without loosing the energy reduction benefits. The methodology has been applied to the design of positive feedback adiabatic logic (PFAL) carry look-ahead adders (CLA). Post-layout simulations of the standard-cell PFAL CLAs show a 94% energy recovery as compared to a conventional static CMOS CLA at 10 MHz, and 86% at 100 MHz. The standard-cell PFAL CLAs are also more energy efficient or comparable than other custom adiabatic CLAs found in the literature.