The swappable logic unit: a paradigm for virtual hardware
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
A Run-Time Reconfigurable Engine for Image Interpolation
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
DES Key Breaking, Encryption and Decryption on the XC6216
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Dynamic Reconfiguration to Support Concurrent Applications
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Preemptive Multitasking on FPGAs
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
High Speed Homology Search Using Run-Time Reconfiguration
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
A Preemption Algorithm for a Multitasking Environment on Dynamically Reconfigurable Processor
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Multithreading Architectures: A Survey
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
OveRSoC: a framework for the exploration of RTOS for RSoC platforms
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Secure virtualization within a multi-processor soft-core system-on-chip architecture
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Functionally verifying state saving and restoration in dynamically reconfigurable systems
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Proceedings of the 15th International Workshop on Software and Compilers for Embedded Systems
HTR: on-chip hardware task relocation for partially reconfigurable FPGAs
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
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Multitasking on an FPGA-based processor is one possibility to explore the efficacy of reconfigurable computing. Conventional computers and operating systems have demonstrated the many advantages of sharing computational hardware by several tasks over time. The ability to do run-time configuration and readback of FPGAs in a coprocessor architecture allows investigating the problems of implementing realistic multitasking. This paper explores the control software required to support task switching for an application split over the host processor - coprocessor boundary as well as the requirements and features of context saving and restoring in the FPGA coprocessor context. An FPGA coprocessor designed especially to support multitasking of such applications is described.