Von Neumann hybrid cellular automata for generating deterministic test sequences
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Cellular Automata for Generating Deterministic Test Sequences
EDTC '97 Proceedings of the 1997 European conference on Design and Test
20.1 A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
8.1 Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Color Counting and its Application to Path Delay Fault Coverage
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Accurate Path Delay Fault Coverage is Feasible
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Implicit deductive fault simulation for complex delay fault models
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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