Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability
Journal of Electronic Testing: Theory and Applications - Special issue on test synthesis
Test generation for primitive path delay faults in combinational circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
On primitive fault test generation in non-scan sequential circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Path delay fault testing using test points
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A new path-oriented effect-cause methodology to diagnose delay failures
ITC '98 Proceedings of the 1998 IEEE International Test Conference
20.1 A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
ENHANCED DELAY DEFECT COVERAGE WITH PATH-SEGMENTS
ITC '00 Proceedings of the 2000 IEEE International Test Conference
TESTING OF CRITICAL PATHS FOR DELAY FAULTS
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Design for Primitive Delay Fault Testability
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Robust Testability of Primitive Faults using Test Points
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Exploring linear structures of critical path delay faults to reduce test efforts
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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