Test Width Compression for Built-In Self Testing

Scalable Test Generators for High-Speed Datapath Circuits

Journal of Electronic Testing: Theory and Applications - Special issue on On-line testing

An exact solution to the minimum size test pattern problem

ACM Transactions on Design Automation of Electronic Systems (TODAES)

A Method for Compressing Test Data Based on Burrows-Wheeler Transformation

IEEE Transactions on Computers

Deterministic Built-in Pattern Generation for Sequential Circuits

Journal of Electronic Testing: Theory and Applications

Test vector decompression via cyclical scan chains and its application to testing core-based designs

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Channel Width Test Data Compression under a Limited Number of Test Inputs and Outputs

VLSID '03 Proceedings of the 16th International Conference on VLSI Design

19.1 Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium

MICRO: a new hybrid test data compression/ decompression scheme

IEEE Transactions on Very Large Scale Integration (VLSI) Systems