H-SCAN+: A Practical Low-Overhead RTL Design-for-Testability Technique for Industrial Designs

Synthesis of Scan Chains for Netlist Descriptions at RT-Level

Journal of Electronic Testing: Theory and Applications

On RTL Scan Design

ITC '01 Proceedings of the 2001 IEEE International Test Conference

Register-transfer level functional scan for hierarchical designs

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Scan Division Algorithm for Shift and Capture Power Reduction for At-Speed Test Using Skewed-Load Test Application Strategy

Journal of Electronic Testing: Theory and Applications

A New Design-for-Testability Method Based on Thru-Testability

Journal of Electronic Testing: Theory and Applications

A graph-based approach to optimal scan chain stitching using RTL design descriptions

VLSI Design - Special issue on New Algorithmic Techniques for Complex EDA Problems