BIST-based delay path testing in FPGA architectures

Exploiting Reconfigurability for Effective Testing of Delay Faults in Sequential Subcircuits of LUT-based FPGAs

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

On the Set of Target Path Delay Faults in Sequential Subcircuits of LUT-based FPGAs

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

BIST-Based Delay-Fault Testing in FPGAs

Journal of Electronic Testing: Theory and Applications

Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs

Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems

Application-Specific Bridging Fault Testing of FPGAs

Journal of Electronic Testing: Theory and Applications

Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs

Journal of Electronic Testing: Theory and Applications

An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs

Journal of Electronic Testing: Theory and Applications

Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis

Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays

Application-dependent testing of FPGAs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations

ACM Transactions on Reconfigurable Technology and Systems (TRETS)