Communications of the ACM
VLSI analogs of neuronal visual processing: a synthesis of form and function
VLSI analogs of neuronal visual processing: a synthesis of form and function
An integrated vision sensor for the computation of optical flow singular points
Proceedings of the 1998 conference on Advances in neural information processing systems II
Asynchronous Communication of 2D Motion Information UsingWinner-Takes-All Arbitration
Analog Integrated Circuits and Signal Processing
A VLSI Architecture for Modeling Intersegmental Coordination
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
A Throughput-On-Demand Address-Event Transmitter for Neuromorphic Chips
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
MICRONEURO '96 Proceedings of the 5th International Conference on Microelectronics for Neural Networks and Fuzzy Systems
A Modular Multi-Chip Neuromorphic Architecture for Real-Time Visual Motion Processing
Analog Integrated Circuits and Signal Processing
A Throughput-On-Demand Address-Event Transmitter for Neuromorphic Chips
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
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We describe a multi-chip CMOS VLSI visual motion processing system which combines analog circuitry with an asynchronous digital interchip communications protocol to allow more complex motion processing than is possible with all the circuitry in the focal plane. The two basic VLSI building blocks are a sender chip which incorporates a 2D imager array and transmits the position of moving spatial edges, and a receiver chip which computes a 2D optical flow vector field from the edge information. The elementary two-chip motion processing system consisting of a single sender and receiver is first characterized. Subsequently, two three-chip motion processing systems are described. The first such system uses two sender chips to compute the presence of motion only at a particular stereoscopic disparity. The second such system uses two receivers to simultaneously compute a linear and polar topographic mapping of the image plane, resulting in information about image translation, rotation, and expansion. These three-chip systems demonstrate the modularity and flexibility of the multi-chip neuromorphic approach.