A Controller Testability Analysis and Enhancement Technique

Authors:
Xinli Gu;Erik Larsson;Krzysztof Kuchinski;Zebo Peng
Affiliations:
Synopsys, Inc., 700 E.Middlefield Road, Mountain View, CA;Dept. of Computer and Information Science, Linköping University, S-581 83 Linköping, Sweden;Dept. of Computer and Information Science, Linköping University, S-581 83 Linköping, Sweden;Dept. of Computer and Information Science, Linköping University, S-581 83 Linköping, Sweden
Venue:
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Year:
1997

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Abstract

This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reach states by analyzing both the data path and the controller of a design. The controller is modified using register initialization, branch control, and loop termination methods to enhance its state reachability. This technique complements the data path scan method and can be used to avoid scanning registers involved in the critical paths. Experimental results show the improvement of fault coverage with a very low area overhead.