Configuration of VLSI Arrays in the Presence of Defects
Journal of the ACM (JACM)
VLSI image processing
Efficient spare allocation in reconfigurable arrays
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Digital Filtering in One and Two Dimensions: Design and Applications
Digital Filtering in One and Two Dimensions: Design and Applications
On the Reconfigurable Operation of Arrays with Defects for Image Processing
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Emulating Reconfigurable Arrays for Image Processing Using the MasPar Architecture
ICPP '93 Proceedings of the 1993 International Conference on Parallel Processing - Volume 03
Wafer-Scale Integration of Systolic Arrays
IEEE Transactions on Computers
The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors
IEEE Transactions on Computers
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This paper presents an approach for the fault tolerant computation of the rank order filtering on a SIMD (Single Instruction Multiple Data) mesh processes such as the MasPar. The proposed approach improves over a previous approach in two respects: by changing the data dependency in the execution of the rank order filtering, a new algorithm with constant execution time complexity can be designed; and by introducing a dependency for the rank values of faulty PEs as computed by neighboring (fault free) processing elements (PEs), a lower distortion can be achieved for enhancement of the image.