Symbolic simulation for functional verification with ADLIB and SDL
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '81 Proceedings of the 18th Design Automation Conference
A functional level modelling language for digital simulation
DAC '82 Proceedings of the 19th Design Automation Conference
Status report of the graphic standards planning committee
ACM SIGGRAPH Computer Graphics - Status report of the graphic standards planning committee
The cookie cutter algorithm for handling mixed hierarchy
ACM SIGDA Newsletter
Auto-interactive schematics to layout translation
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
DAC '84 Proceedings of the 21st Design Automation Conference
Plowing: Interactive stretching and compaction in magic
DAC '84 Proceedings of the 21st Design Automation Conference
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A VLSI design system called VIVID is the heart of a newly developed, vertically integrated design environment. This environment provides support for all phases of design from high-level system specification through on-site fabrication to construction of prototype systems. Key features already Implemented include: the use of a circuit description language at the level of a silicon assembler; a fast, highly interactive combination floor planner and layout editor; fast interactive timing simulation; and layout made free from design-rule constraints by the use of virtual-grid compaction. Functional specification and verification, automated routing, standard cell layout, and semi-automated layout from schematics are being built upon the foundation formed by VIVID.