LSI product quality and fault coverage
DAC '81 Proceedings of the 18th Design Automation Conference
Differential fault simulation - a fast method using minimal memory
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
The Total Delay Fault Model and Statistical Delay Fault Coverage
IEEE Transactions on Computers
Economic Analysis of Test Process Flows for Multichip ModulesUsing Known Good Die
Journal of Electronic Testing: Theory and Applications - Special issue on multi-chip testing and design for testability
Analysis of timing failures due to random AC defects in VLSI modules
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Analyzing Multichip Module Testing Strategies
IEEE Design & Test
Statistical delay fault coverage and defect level for delay faults
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Methodology for & results from the use of a hardware logic simulation engine for fault simulation
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
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A relationship between the quality level of a multichip module package and test coverage is established. A fault model for each stage of assembly of the package is assumed and the contribution of each of these stages to the quality level is assessed to produce the required relationship to test coverage achieved through test generation programs.