PANAMAP-B: A mask verification system for bipolar IC
DAC '81 Proceedings of the 18th Design Automation Conference
An artwork design verification system
DAC '75 Proceedings of the 12th Design Automation Conference
A layout checking system for large scale integrated circuits
DAC '77 Proceedings of the 14th Design Automation Conference
LSI layout checking using bipolar device recognition technique
DAC '79 Proceedings of the 16th Design Automation Conference
Layout extraction and verification methodology CMOS I/O circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
Resistance calculation from mask artwork data by finite element method
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A circuit comparison system for bipolar linear LSI
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A technology independent block extraction algorithm
DAC '84 Proceedings of the 21st Design Automation Conference
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A new layout verification system, called ALAS (ALayout Analysis System) is presented. Its main intention is to tackle the particular verification problems of analog bipolar circuits. At present, the system comprises four main parts: a device recognition program produces a list of devices, a plot program converts these data to a layout-oriented circuit diagram, a connectivity analysis program yields device-oriented or net-oriented descriptions of the derived circuit and a network comparison program tests the consistency of this actual circuit with the intended nominal one. A fifth program, that will calculate the parameters of the actual circuit, is under development. To derive the actual circuit from layout ALAS uses geometrical mask data only; no additional circuit information is needed. If not available from the design system, a description of the nominal circuit may be supplied manually in a SPICE-like input format.