Design rule checking and analysis of IC mask designs
DAC '76 Proceedings of the 13th Design Automation Conference
An artwork design verification system
DAC '75 Proceedings of the 12th Design Automation Conference
CRITIC - an integrated circuit design rule checking program
DAC '74 Proceedings of the 11th Design Automation Workshop
Hierarchical analysis of IC artwork with user defined abstraction rules
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A layout verification system for analog bipolar integrated circuits
DAC '83 Proceedings of the 20th Design Automation Conference
MACH : a high-hitting pattern checker for VLSI mask data
DAC '83 Proceedings of the 20th Design Automation Conference
Design automation status in Japan
DAC '81 Proceedings of the 18th Design Automation Conference
A concurrent pattern operation algorithm for VLSI mask data
DAC '81 Proceedings of the 18th Design Automation Conference
Efficient Boolean operations on IC masks
DAC '81 Proceedings of the 18th Design Automation Conference
Circuit recognition and verification based on layout information
DAC '81 Proceedings of the 18th Design Automation Conference
Design rule verification based on one dimensional scans
DAC '78 Proceedings of the 15th Design Automation Conference
An integrated mask artwork analysis system
DAC '80 Proceedings of the 17th Design Automation Conference
A hierarchical bit-map format for the representation of IC mask data
DAC '80 Proceedings of the 17th Design Automation Conference
Programs for verifying circuit connectivity of mos/lsi mask artwork
DAC '82 Proceedings of the 19th Design Automation Conference
Unified Shapes Checker - a checking tool for LSI
DAC '79 Proceedings of the 16th Design Automation Conference
LSI layout checking using bipolar device recognition technique
DAC '79 Proceedings of the 16th Design Automation Conference
The design of an efficient data base to support an interactive LSI layout system
DAC '79 Proceedings of the 16th Design Automation Conference
Circuit recognition and verification from bipolar and MOS layout information
ACM SIGDA Newsletter
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This paper describes a new design rule checking system for LSI mask patterns. Major features of the system are a relatively small computing time needed, even for very large circuits (e.g. 10,000 elements), wide applications to a variety of fabrication processes, due to its functional flexibility, and minimized spurious errors.