Design rule checking and analysis of IC mask designs
DAC '76 Proceedings of the 13th Design Automation Conference
An artwork design verification system
DAC '75 Proceedings of the 12th Design Automation Conference
Fast algorithms for LSI artwork analysis
DAC '77 Proceedings of the 14th Design Automation Conference
A layout checking system for large scale integrated circuits
DAC '77 Proceedings of the 14th Design Automation Conference
The design of an efficient data base to support an interactive LSI layout system
DAC '79 Proceedings of the 16th Design Automation Conference
An O (N log N) algorithm for boolean mask operations
25 years of DAC Papers on Twenty-five years of electronic design automation
17th design automation conference report June 23-25, 1980
ACM SIGDA Newsletter
Space efficient algorithms for VLSI artwork analysis
DAC '83 Proceedings of the 20th Design Automation Conference
An O (N log N) algorithm for Boolean mask operations
DAC '81 Proceedings of the 18th Design Automation Conference
Efficient Boolean operations on IC masks
DAC '81 Proceedings of the 18th Design Automation Conference
Graphics language / one - IBM Corporate-Wide physical design data format
DAC '81 Proceedings of the 18th Design Automation Conference
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An alternative representation to the usual outline description of geometric entities for IC mask artwork is described. Rather than identifying opaque areas of a mask by individual shape outlines as described by their corners' coordinates, both the opaque and transparent areas of the design are represented by 1' s and 0's respectively in a grid pattern or “bit map” of the entire mask plane. A bit-map representation is well suited to many computer design aids which deal with IC layout data. Artwork output programs which require a “MERGE” operation on all shapes of each mask benefit from this data format since it already contains the merged version of each mask's geometric entities. The bit-map format especially promises to increase the operational efficiency of Boolean comparisons of various mask levels as performed by artwork analysis programs for locating design rule errors and for identifying circuit elements directly from the masks. A hierarchical scheme for describing the bit patterns of a mask efficiently is presented which limits the memory requirements of this data format to a size proportional to the usual outline description. Consequently the bit-map representation can be used not only in those computer aids where it supports program functions very well, but also as the central data format for a CAD system.