ACM president's letter: computer architecture: some old ideas that haven't quite made it yet
Communications of the ACM
Empirical evaluation of some features of instruction set processor architectures
Communications of the ACM
A portable compiler: theory and practice
POPL '78 Proceedings of the 5th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
The case for the reduced instruction set computer
ACM SIGARCH Computer Architecture News
Comments on "the case for the reduced instruction set computer," by Patterson and Ditzel
ACM SIGARCH Computer Architecture News
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
RISC I: A Reduced Instruction Set VLSI Computer
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Retrospective on high-level language computer architecture
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
ACM SIGARCH Computer Architecture News - Special Issue: Architectural Support for Operating Systems
An overview of RISC architecture
SAC '92 Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing: technological challenges of the 1990's
Dhrystone: a synthetic systems programming benchmark
Communications of the ACM
ACM SIGARCH Computer Architecture News
The reduction of branch instruction execution overhead using structured control flow
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
HLLDA defies RISC: thoughts on RISCs, CISCs, and HLLDAs
ACM SIGMICRO Newsletter
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We present the result of an informal experiment comparing the performance of one Reduced Instruction Set Computer, RISC I, to five traditional computers, VAX-11/780, PDP-11/70, BBN C/70, MC68000, and Z8000, in a high-level language environment. Measuring either absolute performance or the penalty for using high-level languages, the best computer is RISC I.