The C programming language
The Generation of Optimal Code for Stack Machines
Journal of the ACM (JACM)
The development of the MU5 computer system
Communications of the ACM - Special issue on computer architecture
Implications of structured programming for machine architecture
Communications of the ACM
Implementation of a high level language machine
Communications of the ACM
BLISS: a language for systems programming
Communications of the ACM
A microprogrammed implementation of EULER on IBM system/360 model 30
Communications of the ACM
Advances in Computer Architecture
Advances in Computer Architecture
The Design of an Optimizing Compiler
The Design of an Optimizing Compiler
High level language oriented hardware and the post-von Neumann era
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Optimal code generation for expression trees
STOC '75 Proceedings of seventh annual ACM symposium on Theory of computing
Design of an aerospace computer for direct HOL execution
HLLCA '73 Proceedings of the ACM-IEEE symposium on High-level-language computer architecture
A high order language optimal execution processor Fast Intent Recognition System (FIRST)
HLLCA '73 Proceedings of the ACM-IEEE symposium on High-level-language computer architecture
Implementation aspects of the symbol hardware compiler
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
PL/I Reducer and Direct Processor
ACM '69 Proceedings of the 1969 24th national conference
Proceedings of the meeting on SIGPLAN/SIGMICRO interface
On "PASCAL," code generation, and the CDC 6000 computer.
On "PASCAL," code generation, and the CDC 6000 computer.
An apl machine
A snobol machine: functional architectural concepts of a string processor
A snobol machine: functional architectural concepts of a string processor
A study of language directed computer design
A study of language directed computer design
An algol 68 machine and translator.
An algol 68 machine and translator.
Decompilation of object programs
Decompilation of object programs
Matching program and data representations to a computing environment.
Matching program and data representations to a computing environment.
Computer system organization: The B5700/B6700 series (ACM monograph series)
Computer system organization: The B5700/B6700 series (ACM monograph series)
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Performance effects of architectural complexity in the Intel 432
ACM Transactions on Computer Systems (TOCS)
The structure and performance of interpreters
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Strategic directions in computer architecture
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
RISC I: a reduced instruction set VLSI computer
25 years of the international symposia on Computer architecture (selected papers)
ACM president's letter: computer architecture: some old ideas that haven't quite made it yet
Communications of the ACM
The case for the reduced instruction set computer
ACM SIGARCH Computer Architecture News
Comments on "the case for the reduced instruction set computer," by Patterson and Ditzel
ACM SIGARCH Computer Architecture News
Architecture of a VLSI instruction cache for a RISC
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
RISC assessment: A high-level language experiment
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
HLL architectures: Pitfalls and predilections
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
On the semantic structure of information - A proposal of the abstract storage architecture
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Compiler chip: A hardware implementation of compiler
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
Some requirements for architectural support of software debugging
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
Structured machine design: An ongoing experiment
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
RISC I: A Reduced Instruction Set VLSI Computer
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Mapping HLL constructs into microcode for improved execution speed
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Some remarks on direct execution computers
ACM SIGARCH Computer Architecture News
Peering through the RISC/CISC fog: an outline of research
ACM SIGARCH Computer Architecture News
On the design of Always Compatible Instruction Set Architecture(ACISA)
ACM SIGARCH Computer Architecture News
A preliminary survey of artificial intelligence machines
ACM SIGART Bulletin
A GaAs-Based Microprocessor Architecture for Real-Time Applications
IEEE Transactions on Computers
Representing the Effect of Instruction Prefetch in a Microprocessor Performance Model
IEEE Transactions on Computers
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High-level language computers (HLLC) have attracted interest in the architectural and programming community during the last 15 years; proposals have been made for machines directed towards the execution of various languages such as ALGOL,1,2 APL,3,4,5 BASIC,6,7 COBOL,8,9 FORTRAN,10,ll LISP,12,13 PASCAL,14 PL/I,15,16,17 SNOBOL,18,19 and a host of specialized languages. Though numerous designs have been proposed, only a handful of high-level language computers have actually been implemented.4,7,9,20,21 In examining the goals and successes of high-level language computers, the authors have found that most designs suffer from fundamental problems stemming from a misunderstanding of the issues involved in the design, use, and implementation of cost-effective computer systems. It is the intent of this paper to identify and discuss several issues applicable to high-level language computer architecture, to provide a more concrete definition of high-level language computers, and to suggest a direction for high-level language computer architectures of the future.