VLSI Architectures for Computing Multiplications and Inverses in GF(2m)
IEEE Transactions on Computers
VLSI array processors
A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Optimal normal bases in GF(pn)
Discrete Applied Mathematics
A VLSI Architecture for Fast Inversion in GF(2/sup m/)
IEEE Transactions on Computers
Architectures for Exponentiation Over GD(2/sup n/) Adopted for Smartcard Application
IEEE Transactions on Computers
On Computing Multiplicative Inverses in GF(2/sup m/)
IEEE Transactions on Computers
A Systolic Architecture for Computing Inverses and Divisions in Finite Fields GF(2/sup m/)
IEEE Transactions on Computers
A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields
IEEE Transactions on Computers
Bit-Level Systolic Array for Fast Exponentiation in GF(2/sup m/)
IEEE Transactions on Computers
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Arithmetic over finite fields has significant applications in switching theory, error-correcting codes, cryptography etc. In this article, we present several algorithms and design architectures for some of the operations over GF(2^m). The architectures use One-Dimensional Arrays with regular and nearest-neighbor interconnections. Together with a modification of the standard basis multiplier of Pal Chaudhuri and Barua, our designs cover array-based implementations for all these operations for both normal and standard basis. We also design a normal basis multiplier which, for many values of m, has less complicated interconnections and by achieving squaring in standard basis in one clock cycle, we establish this basis as a practicable alternative to normal basis for fast and efficient arithmetic operations over GF(2^m).