Architectures for Arithmetic over GF(2^m)

  • Authors:
  • Rana Barua;Samik Sengupta

  • Affiliations:
  • -;-

  • Venue:
  • VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
  • Year:
  • 1997

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Abstract

Arithmetic over finite fields has significant applications in switching theory, error-correcting codes, cryptography etc. In this article, we present several algorithms and design architectures for some of the operations over GF(2^m). The architectures use One-Dimensional Arrays with regular and nearest-neighbor interconnections. Together with a modification of the standard basis multiplier of Pal Chaudhuri and Barua, our designs cover array-based implementations for all these operations for both normal and standard basis. We also design a normal basis multiplier which, for many values of m, has less complicated interconnections and by achieving squaring in standard basis in one clock cycle, we establish this basis as a practicable alternative to normal basis for fast and efficient arithmetic operations over GF(2^m).