13.1 A Study on the Utility of Using Expected Quality Level as a Design for Testability Metric

Authors:
D. Williams;F. J. Ferguson;T. Larrabee
Affiliations:
-;-;-
Venue:
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Year:
1998

Citing 7
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Abstract

This paper develops a Physical Design for Test (PDFT) metric that is directly related to the expectedv quality level (QL) contribution of a cell to a circuit, and it details experimental results showing the usefulness of this metric in predicting the quality level contribution of a cell to circuits that have yet to be designed. The PDFT metric shows what QL increase can be expected for the circuit by changing the physical design of a component of the circuit.