The craft of software testing: subsystem testing including object-based and object-oriented testing
The craft of software testing: subsystem testing including object-based and object-oriented testing
Functional verification of the CMOS S/390 parallel enterprise server G4 system
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
User defined coverage—a tool supported methodology for design verification
DAC '98 Proceedings of the 35th annual Design Automation Conference
Design reliability—estimation through statistical analysis of bug discovery data
DAC '98 Proceedings of the 35th annual Design Automation Conference
Micro architecture coverage directed generation of test programs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Architectural Verification of Processors Using Symbolic Instruction Graphs
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
A Methodology for Processor Implementation Verification
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Coverage-Directed Test Generation Using Symbolic Techniques
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
IBM Journal of Research and Development
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Test generation and simulation tools have input stimuli thatcan direct them to cover specific events. However, the costof completely covering a verification plan is still very high.While coverage analysis tools can find events that have notbeen covered, they do not provide an automated coveringmethod. This paper presents the first implementation of ageneration framework that uses feedback from coverageanalysis to direct microarchitecture simulation. Thisframework uses a coverage analysis tool to find events thathave not been simulated and then utilizes information aboutthe design to determine which directives should be given tothe simulation environment. This paper describes, in detail,the system and its operation process, an experiment thatuses the system, and the results of the experiment. Thissystem was shown to reduce the machine time and persontime required to cover the test plan. Implications of thiswork suggest the types of verification plans appropriate forthe utilization of this system and the further experiments anddevelopments required.