Using combinational verification for sequential circuits
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Optimizing sequential verification by retiming transformations
Proceedings of the 37th Annual Design Automation Conference
Latency-guided on-chip bus network design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Min-area retiming on flexible circuit structures
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Postsilicon Validation Methodology for Microprocessors
IEEE Design & Test
Formal Verification Methods for Industrial Hardware Design
SOFSEM '01 Proceedings of the 28th Conference on Current Trends in Theory and Practice of Informatics Piestany: Theory and Practice of Informatics
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
EUROCAST'07 Proceedings of the 11th international conference on Computer aided systems theory
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The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication process, and include memory on-chip. To design a processor in a DRAM process ...