Generating sparse partial inductance matrices with guaranteed stability
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Figures of merit to characterize the importance of on-chip inductance
DAC '98 Proceedings of the 35th annual Design Automation Conference
Dealing with inductance in high-speed chip design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
IC analyses including extracted inductance models
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
On-chip inductance issues in multiconductor systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Quick On-Chip Self- and Mutual-Inductance Screen
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Inductance calculations in a complex integrated circuit environment
IBM Journal of Research and Development
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How does on-chip inductance impact timing closure when transitioning from Al to Cu based technology? This paper presents some experimental results based on a Al-based 0.18 µm CMOS process and a Cu-based 0.13 µm CMOS process. The results show that the impact of on-chip inductance is slightly more on the Cu-based 0.3 µm process than on the Al-based 0.18 µm process. Furthermore, the results demonstrate that on-chip inductance plays an insignificant role if we assume a perfect power supply network around the interconnect routes.