DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Generating sparse partial inductance matrices with guaranteed stability
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Stable and efficient reduction of substrate model networks using congruence transforms
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Modeling and characterization of long on-chip interconnections for high-performance microprocessors
IBM Journal of Research and Development
PRIMA: passive reduced-order interconnect macromodeling algorithm
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
CMOS gate delay models for general RLC loading
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Equipotential shells for efficient inductance extraction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On-chip inductance modeling and analysis
Proceedings of the 37th Annual Design Automation Conference
Interconnect parasitic extraction in the digital IC design methodology
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Efficient inductance extraction via windowing
Proceedings of the conference on Design, automation and test in Europe
On the impact of on-chip inductance on signal nets under the influence of power grid noise
Proceedings of the conference on Design, automation and test in Europe
Inductance 101: analysis and design issues
Proceedings of the 38th annual Design Automation Conference
Modeling magnetic coupling for on-chip interconnect
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Hierarchical interconnect circuit models
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A twisted-bundle layout structure for minimizing inductive coupling noise
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Formulae and applications of interconnect estimation considering shield insertion and net ordering
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Impact of On-Chip Inductance When Transitioning from Al to Cu Based Technology
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Determination of worst-case crosstalk noise for non-switching victims in GHz+ interconnects
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Speeding Up PEEC partial inductance computations using a QR-based algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On the impact of on-chip inductance on signal nets under the influence of power grid noise
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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