High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Aspects of design quality models: “To err is human—to correct is divine”
Economics of design and test for electronic circuits and systems
Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Quantifying Design Quality Through Design Experiments
IEEE Design & Test
Defect Level as a Function of Fault Coverage
IEEE Transactions on Computers
Exploiting intellectual properties with imprecise design costs for system-on-chip synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Design quality metrics will be defined in terms of the probability that a completed design satisfies its specifications. The definition rests on the concept of atomic design operations, and is by nature canonical. It is shown that this definition is truly analogous to test quality, leading to a unified model of test and design quality. Another important aspect of the design is its efficiency, related to design parameters. The metrics of design efficiency may be expressed as a cost function, and different design proposals may be evaluated against estimated design efficiency. Examples from several years of graduate level student design experiments will be given in order to demonstrate the usefulness of these metrics.