Software reliability: measurement, prediction, application
Software reliability: measurement, prediction, application
Combined probabilistic testability calculation and compact test generation for PLAs
Journal of Electronic Testing: Theory and Applications
New design error modeling and metrics for design validation
EURO-DAC '92 Proceedings of the conference on European design automation
Creating wealth—through testing?
Economics of design and test for electronic circuits and systems
Concurrent information systems engineering and quality control with CFS
Economics of design and test for electronic circuits and systems
The sciences of the artificial (3rd ed.)
The sciences of the artificial (3rd ed.)
High-Level VLSI Synthesis
Formal Verification of VHDL Descriptions in the Prevail Environment
IEEE Design & Test
Improving Total IC Design Quality Using Application Mode Testing
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Quantifying design productivity: an effort distribution analysis
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Design verification via simulation and automatic test pattern generation
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Formal Methods in System Design
Logic Design Validation via Simulation and Automatic Test Pattern Generation
Journal of Electronic Testing: Theory and Applications
Design Quality and Design Efficiency; Definitions, Metrics and Relevant Design Experiences
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Measuring HDL-based design productivity: an experimental comparison
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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The authors present a model for design quality metrics, discuss its relevance, and give some examples of use. Design experiments demonstrate error data extraction and analysis. Using a model of the design process for electronic products that emphasizes the resulting quality of the design, the authors demonstrated that they can quantify design quality. They can best express the probability of an error-free design in terms of the quality of the synthesis process and the quality of the verification procedure.