Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low power realization of finite state machines—a decomposition approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Finite state machine decomposition for low power
DAC '98 Proceedings of the 35th annual Design Automation Conference
FSM decomposition by direct circuit manipulation applied to low power design
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Elements of the Theory of Computation
Elements of the Theory of Computation
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
High-level power modeling, estimation, and optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Low-power state assignment targeting two- and multilevel logic implementations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
State re-encoding for peak current minimization
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Opposite-phase register switching for peak current minimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Genetic algorithm-based FSM synthesis with area-power trade-offs
Integration, the VLSI Journal
Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
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The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state encoding. Modeling a given circuit as a finite-state machine, we formulate its decomposition into submachines as an integer linear programming (ILP) problem, and automatically generate the ILP model with power minimization as the objective. A simple, but powerful state encoding method is used for the submachines to further reduce power consumption. We present experimental results which show that circuits designed by our approach consume 30% to 90% less power than conventional circuits.