Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses

  • Authors:
  • Z. Zheng;L. Pileggi;M. Beattie;B. Krauter

  • Affiliations:
  • Carnegie Mellon University, Department of Electrical and Computer Enginnering, 5000 Forbes Avenue;Carnegie Mellon University, Department of Electrical and Computer Enginnering, 5000 Forbes Avenue;Carnegie Mellon University, Department of Electrical and Computer Enginnering, 5000 Forbes Avenue;IBM Corporation, 11400 Burnett Road, Austin, TX

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2002

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Abstract

Due to the increasing operating frequencies and the mannerin which the corresponding integrated circuits and systemsmust be designed, the extraction, modeling andsimulation of the magnetic couplings for final design verificationcan be a daunting task. In general, when modeling inductanceand the associated return paths, one must considerthe on-chip conductors as well as the system packaging. Thiscan result in an RLC circuit size that is impractical for traditionalsimulators. In this paper we demonstrate a localized,window-based extraction and simulation methodologythat employs the recently proposed susceptance (the inverseof inductance matrix) concept. We provide a qualitative explanationfor the efficacy of this approach, and demonstratehow it facilitates pre-manufacturing simulations that wouldotherwise be intractable. A critical aspect of this simulationefficiency is owed to a susceptance-based circuit formulationthat we prove to be symmetric positive definite. Thisproperty, along with the sparsity of the susceptance matrix,enables the use of some advanced sparse matrix solvers. Wedemonstrate this extraction and simulation methodology onsome industrial examples.