FastHenry: a multipole-accelerated 3-D inductance extraction program
DAC '93 Proceedings of the 30th international Design Automation Conference
SPIE: sparse partial inductance extraction
DAC '97 Proceedings of the 34th annual Design Automation Conference
On-chip inductance modeling and analysis
Proceedings of the 37th Annual Design Automation Conference
KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Inductance 101: modeling and extraction
Proceedings of the 38th annual Design Automation Conference
Modeling magnetic coupling for on-chip interconnect
Proceedings of the 38th annual Design Automation Conference
How to efficiently capture on-chip inductance effects: introducing a new circuit element K
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A local circuit topology for inductive parasitics
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
INDUCTWISE: inductance-wise interconnect simulator and extractor
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
On-chip interconnect modeling by wire duplication
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses
Proceedings of the conference on Design, automation and test in Europe
An efficient algorithm for 3-D reluctance extraction considering high frequency effect
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
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A new methodology is presented to capture high frequency effects of interconnect, namely skin and proximity by using the reluctance (inverse inductance) method. As demonstrated in numerous publications that the reluctance method exhibits excellent locality and suitability of sparsification. The reluctance method results in great benefit in terms of efficiency of extraction and simulation. Most of the previous studies described the reluctance extraction method without taking frequency dependent effects into consideration. In this paper, we first show the differences in frequency response between formula-based inductance extraction and frequency dependent inductance extraction to demonstrate the need to capture high frequency effect. Then a novel frequency dependent reluctance extraction method is proposed by using a robust windowing policy, which is able to handle irregular geometries in VLSI applications. Experimental results demonstrate the superior runtime and accuracy over traditional partial inductance extraction.