Emulating static faults using a Xilinx based emulator

Authors:
R. W. Wieler
Affiliations:
-
Venue:
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Year:
1995

Citing 5
Cited 1

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Abstract

Abstract: Fault emulation is a logical extension of current trend of using multiple FPGAs for ASIC emulation. This paper presents the basic infrastructure needed for such an emulator, and discusses the advantages of using a fault emulator as compared to a fault simulator.