Coverage directed test generation for functional verification using bayesian networks
Proceedings of the 40th annual Design Automation Conference
A Probabilistic Method for the Computation of Testability of RTL Constructs
Proceedings of the conference on Design, automation and test in Europe - Volume 1
RTL Test Pattern Generation for High Quality Loosely Deterministic BIST
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
StressTest: an automatic approach to test generation via activity monitors
Proceedings of the 42nd annual Design Automation Conference
Depth-driven verification of simultaneous interfaces
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A Survey of Hybrid Techniques for Functional Verification
IEEE Design & Test
State space exploration using feedback constraint generation and Monte-Carlo sampling
Proceedings of the the 6th joint meeting of the European software engineering conference and the ACM SIGSOFT symposium on The foundations of software engineering
Design validation of multithreaded architectures using concurrent threads evolution
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Using virtual coverage to hit hard-to-reach events
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
Scalable sampling methodology for logic simulation: reduced-ordered Monte Carlo
Proceedings of the International Conference on Computer-Aided Design
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Abstract: A new asynchronous pipeline design is introduced for high-speed applications. The pipeline uses simple transparent latches in its datapath, and small latch controllers consisting of only a single gate per pipeline stage. This simple stage structure ...