Delay Defect Characteristics and Testing Strategies
IEEE Design & Test
ELF-Murphy Data on Defects and Test Sets
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Proceedings of the Conference on Design, Automation and Test in Europe
An Effective and Accurate Methodology for the Cell Internal Defect Diagnosis
Journal of Electronic Testing: Theory and Applications
Diagnosis of single stuck-at faults and multiple timing faults in scan chains
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A technique capable of diagnosing single and multiple stuck-open and stuck-at faults is presented. Eleven sequence-dependent chips (test results depend on the order of test patterns) are diagnosed. Seven of them are diagnosed as having single stuck-open faults. Two of them are diagnosed as having multiple stuck-at and stuck-open faults.