Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines

  • Authors:
  • Heather Quinn;L. A. Smith King;Miriam Leeser;Waleed Meleis

  • Affiliations:
  • -;-;-;-

  • Venue:
  • FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
  • Year:
  • 2003

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Abstract

The combination of hardware acceleration and flexibilitymake FPGAs important to image processing applications.There is also a need for efficient, flexible hardware/softwarecodesign environments that can balance the benefits andcosts of using FPGAs. Image processing applications oftenconsist of a pipeline of components where each componentapplies a different processing algorithm. Componentscan be implemented for FPGAs or software. Such systemsenable an image analyst to work with either FPGA or softwareimplementations of image processing algorithms for agiven problem. The pipeline assignment problem choosesfrom alternative implementations of pipeline componentsto yield the fastest pipeline. Our codesign system solvesthe pipeline assignment problem to provide the most effectiveimplementation automatically, so the image analyst canfocus solely on choosing components which make up thepipeline. However, the pipeline assignment problem is NPcomplete. An efficient, dynamic solution to the pipeline assignmentproblem is a desirable enabler of codesign systemswhich use both FPGA and software implementations.This paper is concerned with solving pipeline assignment inthis context. Consequently, we focus on optimal and heuristicmethods for fast (fixed time limit) runtime pipeline assignment.Exhaustive search, integer linear programmingand local search methods for pipeline assignment are investigated.We present experimental findings for pipelinesof 20 or fewer components which show that in our environment,optimal runtime solutions are possible for smallerpipelines and nearly optimal heuristic solutions are possiblefor larger pipelines.