Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
Fast Converter for 3 Moduli RNS Using New Property of CRT
IEEE Transactions on Computers
High-Speed Parallel-Prefix Modulo 2n - 1 Adders
IEEE Transactions on Computers - Special issue on computer arithmetic
High-Speed and Reduced-Area Modular Adder Structures for RNS
IEEE Transactions on Computers
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Adaptive redundant residue number system coded multicarrier modulation
IEEE Journal on Selected Areas in Communications
An efficient architecture for designing reverse converters based on a general three-moduli set
Journal of Systems Architecture: the EUROMICRO Journal
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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In many earlier publications, different authors have suggested residue to binary converters for the moduli sets: (2n, 2n - 1,2n + 1) and (2n, 2n - 1,2n-1 - 1), where n is a positive integer. In this paper, we are introducing the moduli set (2n-1, 2n - 1,2n + 1), which is one bit less in its dynamic range than that of (2n, 2n - 1,2n + 1) However, it has a similar dynamic range to that of (2n, 2n - 1,2n-1 - 1). Closed form multiplicative inverses for the new set are introduced. Based on these inverses, a residue to binary converter design is proposed which requires less time and hardware than all published converters for the other two moduli sets.