Quaternary to binary bit conversion CMOS integrated circuit design using multiple-input floating gate MOSFETS

Authors:
A. Srivastava;H. N. Venkata
Affiliations:
Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA;Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA
Venue:
Integration, the VLSI Journal
Year:
2003

Citing 4
Cited 2

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Abstract

Multiple-input floating gate MOSFETs and floating gate potential diagrams have been used for the conversion of quaternary-valued input into corresponding binary output in CMOS integrated circuit design environments. The method is demonstrated through the design of a circuit for conversion of quaternary inputs into the corresponding binary bits in a standard 1.5 µm digital CMOS technology. The physical design of the circuit is simulated and tested with SPICE using MOSIS BSIM3 model parameters. Measurements on fabricated devices for the conversion of quaternary input (decimal 0-3) into binary output (binary 00-11) have shown agreement with the corresponding simulated values. The conversion method is simple and compatible with the present CMOS process. The circuit can be embedded in digital CMOS VLSI design architectures.