Optimization of error detecting codes for the detection of crosstalk originated errors
Proceedings of the conference on Design, automation and test in Europe
Estimation of the likelihood of capacitive coupling noise
Proceedings of the 39th annual Design Automation Conference
Low Power Error Resilient Encoding for On-Chip Data Buses
Proceedings of the conference on Design, automation and test in Europe
Statistical Timing Analysis Using Bounds
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
SACI: statistical static timing analysis of coupled interconnects
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Crosstalk analysis in nanometer technologies
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Polaris: a system-level roadmapping toolchain for on-chip interconnection networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Noise violation analysis due to crosstalk is recognized as one of the most challenging problems in Ultra Deep Submicron circuits, besides statistical techniques seem to be a promising approach both for early estimation and final signoff tasks. In this work a general closed form for the voltage distribution on the victim line, based on capacitance statistical distributions, is derived. Experimental results show that the proposed methodology is reliable to early estimate the effect of process variations on crosstalk noise.