Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms

Authors:
K. Tatas;M. Dasygenis;N. Kroupis;A. Argyriou;D. Soudris;A. Thanailakis
Affiliations:
Department of Electrical and Computer Engineering, VLSI Design and Testing Center, Democritus University of Thrace, Xanthi 67100, Greece;Department of Electrical and Computer Engineering, VLSI Design and Testing Center, Democritus University of Thrace, Xanthi 67100, Greece;Department of Electrical and Computer Engineering, VLSI Design and Testing Center, Democritus University of Thrace, Xanthi 67100, Greece;School of Electrical & Computer Engineering, 325716 Georgia Institute of Technology, Atlanta, GA;Department of Electrical and Computer Engineering, VLSI Design and Testing Center, Democritus University of Thrace, Xanthi 67100, Greece;Department of Electrical and Computer Engineering, VLSI Design and Testing Center, Democritus University of Thrace, Xanthi 67100, Greece
Venue:
Real-Time Imaging - Special issue on software engineering
Year:
2003

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Abstract

A memory power optimization and performance exploration methodology based on high-level (C language) code transformations that allows the system designer to explore various data memory power, data memory area and performance trade-offs early in the design process of embedded multimedia systems is introduced. This exploration strategy is introduced for both single and multiprocessor environments. The latter requires partitioning of the application. After employing software transformations, the experimental results, obtained using four well-known motion estimation kernels provide an insight on the performance and energy consumption trade-offs, comparing memory hierarchies for the ARM programmable core and prove the validity of the proposed approach.