A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
A VLSI architecture for lifting-based forward and inverse wavelettransform
IEEE Transactions on Signal Processing
Line-based, reduced memory, wavelet image compression
IEEE Transactions on Image Processing
An efficient architecture for two-dimensional discrete wavelet transform
IEEE Transactions on Circuits and Systems for Video Technology
Evaluation of design alternatives for the 2-D-discrete wavelet transform
IEEE Transactions on Circuits and Systems for Video Technology
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Parallel Architecture for 2-D Discrete Wavelet Transform with Low Energy Consumption
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
A 2-DDWT parallel architecture fully exploiting DRAM burst accesses
SPPRA '08 Proceedings of the Fifth IASTED International Conference on Signal Processing, Pattern Recognition and Applications
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An architecture for the lifting-based two-dimensional discrete wavelet transform is presented. The architecture is easily scaled to accommodate different numbers of lifting steps. The architecture has regular data flow and low control complexity, and achieves 100% hardware utilization. Symmetric extension of the image to be transformed is handled in a way that does not require additional computations or clock cycles. The architecture is investigated in terms of hardware parameters such as memory size and number of ports, number of memory accesses, latency, and throughput. The proposed architecture achieves higher throughput and uses less embedded memory than architectures based on convolutional filter banks.