An efficient architecture for lifting-based two-dimensional discrete wavelet transforms

Authors:
S. Barua;J. E. Carletta;K. A. Kotteri;A. E. Bell
Affiliations:
Department of Electrical and Computer Enqineering, The University of Akron, Akron, OH;Department of Electrical and Computer Enqineering, The University of Akron, Akron, OH;Department of Electrical and Computer Engineering, Virginia Tech., Blacksburg, VA;Department of Electrical and Computer Engineering, Virginia Tech., Blacksburg, VA
Venue:
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Year:
2005

Citing 7
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Abstract

An architecture for the lifting-based two-dimensional discrete wavelet transform is presented. The architecture has regular data flow and low control complexity, and achieves 100% hardware utilization. It is easily adapted to arbitrary image sizes, multiple levels of transform, and different numbers of lifting steps. Symmetric extension of the image to be transformed is handled in a way that does not require additional computations or clock cycles. The proposed architecture achieves higher throughput and uses 30% fewer lines of embedded memory than architectures based on convolutional filter banks. The architecture has been implemented on an Altera APEX20KE field programmable gate array for three differently quantized versions of the biorthogonal 9/7 filter set used for JPEG2000 lossy compression. Our best implementation of a one-level two-dimensional discrete wavelet transform achieves a throughput of 66.8 megapixels per second using 7726 logic elements.