On the models for designing VLSI asynchronous digital systems
Integration, the VLSI Journal
Communications of the ACM
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems
IEEE Transactions on Computers
Proceedings of the 4th ACM international conference on Embedded software
An optimal design method for de-synchronous circuit based on control graph
APPT'07 Proceedings of the 7th international conference on Advanced parallel processing technologies
Modeling and synthesis of asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Desynchronization: design for verification
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
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The desynchronization approach combines a traditional synchronous specification style with a robust asynchronous implementation model. The main contribution of this paper is the description of two optimizations that decrease the overhead of desynchronization. First, we investigate the use of clustering to vary the granularity of desynchronization. Second, by applying temporal analysis on a formal execution model of the desynchronized design, we uncover significant amounts of timing slack. These methods are successfully applied to industrial RTL designs.