Low-power digital systems based on adiabatic-switching principles
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
True single-phase adiabatic circuitry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Power estimation in adiabatic circuits: a simple and accurate model
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A true single-phase energy-recovery multiplier
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimization of circuit trajectories: an auxiliary network approach
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Elmore model for energy estimation in RC trees
Proceedings of the 43rd annual Design Automation Conference
A secure and low-energy logic style using charge recovery approach
Proceedings of the 13th international symposium on Low power electronics and design
Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles
Integration, the VLSI Journal
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The principle of adiabatic switching in conventional energy-recovery adiabatic circuit is generally explained with the help of a rudimentary RC circuit being driven by a constant current source. However, it is not strictly accurate to approximate a MOS adiabatic circuit by such an elementary model owing to its failure to incorporate the nonlinearity of very deep sub-micron transistors. This paper employs the theory of variational calculus in order to extend the principle of optimality used in this RC model to general MOS adiabatic circuits. Our experimental results include energy dissipation comparison in various adiabatic schemes using optimal power clocking versus other waveforms.