Low-power digital systems based on adiabatic-switching principles
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
True single-phase adiabatic circuitry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs
Proceedings of the 38th annual Design Automation Conference
Modeling and minimization of interconnect energy dissipation in nanometer technologies
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 39th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect Technology and Design for Gigascale Integration
Interconnect Technology and Design for Gigascale Integration
Circuit Level Reliability Analysis of Cu Interconnects
ISQED '04 Proceedings of the 5th International Symposium on Quality Electronic Design
On optimality of adiabatic switching in MOS energy-recovery circuit
Proceedings of the 2004 international symposium on Low power electronics and design
Evaluation of energy consumption in RC ladder circuits driven by a ramp input
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
WITHIN DIE THERMAL GRADIENT IMPACT ON CLOCK-SKEW: ANEW TYPE OF DELAY-FAULT MECHANISM
ITC '04 Proceedings of the International Test Conference on International Test Conference
Power distribution analysis of VLSI interconnects using model order reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An interconnect energy model considering coupling effects
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis and modeling of energy consumption in RLC tree circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An improved Elmore delay model for VLSI interconnects
Mathematical and Computer Modelling: An International Journal
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This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, time-varying power supplies, and resonant clock generators. An Elmore energy model that is the computational analog of the conventional Elmore delay model for RC trees is described. Simulation results indicate that the error in energy estimation is less than 2.5% in the worst-case in comparison to HSPICE simulations, with over a 1000X speed-up.