Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs

  • Authors:
  • Amir H. Ajami;Kaustav Banerjee;Massoud Pedram;Lukas P. P. P. van Ginneken

  • Affiliations:
  • Dept. of EE-Systems, Univ. of Southern California, Los Angeles, CA;Center of Integrated Systems, Stanford University, Stanford, CA;Dept. of EE-Systems, Univ. of Southern California, Los Angeles, CA;Magma Design Automation Inc., Cupertino, CA

  • Venue:
  • Proceedings of the 38th annual Design Automation Conference
  • Year:
  • 2001

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Abstract

Non-uniform temperature profiles along global interconnect lines in high-performance ICs can significantly impact the performance of these lines. This paper presents a detailed analysis and modeling of the interconnect performance degradation due to non-uniform temperature profiles that exist along their lengths, which in turn arise due to the thermal gradients in the underlying substrate. A non-uniform temperature-dependent distributed RC interconnect delay model is proposed for the first time. The model has been applied to a wide variety of interconnect layouts and temperature distributions to quantify the impact on signal integrity issues including clock skew fluctuations.