DAC '98 Proceedings of the 35th annual Design Automation Conference
A practical repeater insertion method in high speed VLSI circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
A practical approach to static signal electromigration analysis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Multiple Si layer ICs: motivation, performance analysis, and design implications
Proceedings of the 37th Annual Design Automation Conference
Analysis and optimization of thermal issues in high-performance VLSI
Proceedings of the 2001 international symposium on Physical design
Proceedings of the 2001 international symposium on Physical design
Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Estimation of power distribution in VLSI interconnects
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Power Supply Design Parameters for Switching-Noise Control in Deep-Submicron Circuits Design Flows
Analog Integrated Circuits and Signal Processing
Analysis of substrate thermal gradient effects on optimal buffer insertion
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Coupled analysis of electromigration reliability and performance in ULSI signal nets
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Microelectronic Engineering
3D thermal-ADI: an efficient chip-level transient thermal simulator
Proceedings of the 2003 international symposium on Physical design
Partition-driven standard cell thermal placement
Proceedings of the 2003 international symposium on Physical design
Full-Chip Signal Interconnect Analysis for Electromigration Reliability
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Early Addressing IC and Package Relationship Allows an Overall Better Quality of Complex SOC
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Thermal and Power Integrity Based Power/Ground Networks Optimization
Proceedings of the conference on Design, automation and test in Europe - Volume 2
An electromigration and thermal model of power wires for a priori high-level reliability prediction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI
Analog Integrated Circuits and Signal Processing
Peak temperature control and leakage reduction during binding in high level synthesis
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
A thermal-driven floorplanning algorithm for 3D ICs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Efficient full-chip thermal modeling and analysis
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Electrothermal analysis and optimization techniques for nanoscale integrated circuits
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Floorplanning for 3-D VLSI design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Thermal resilient bounded-skew clock tree optimization methodology
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
Proceedings of the 2006 international symposium on Low power electronics and design
Thermal-aware high-level synthesis based on network flow method
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Statistical circuit optimization considering device andinterconnect process variations
Proceedings of the 2007 international workshop on System level interconnect prediction
Minimal skew clock embedding considering time variant temperature gradient
Proceedings of the 2007 international symposium on Physical design
Simultaneous power and thermal integrity driven via stapling in 3D ICs
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Self-heating-aware optimal wire sizing under Elmore delay model
Proceedings of the conference on Design, automation and test in Europe
Collaborative sensing of on-chip wire temperatures using interconnect based ring oscillators
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
Dynamic thermal clock skew compensation using tunable delay buffers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Evaluating the effects of temperature gradients and currents nonuniformity in on-chip interconnects
Microelectronics Journal
Proceedings of the 2009 International Conference on Computer-Aided Design
An intra-chip free-space optical interconnect
Proceedings of the 37th annual international symposium on Computer architecture
An accurate interconnect thermal model using equivalent transmission line circuit
Proceedings of the Conference on Design, Automation and Test in Europe
Thermal-aware clock tree design to increase timing reliability of embedded SoCs
IEEE Transactions on Circuits and Systems Part I: Regular Papers
TABS: temperature-aware layout-driven behavioral synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Thermal via allocation for 3-D ICs considering temporally and spatially variant thermal power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Agent-based thermal management using real-time I/O communication relocation for 3D many-cores
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
SPECO: Stochastic Perturbation based Clock tree Optimization considering temperature uncertainty
Integration, the VLSI Journal
Co-tuning of a hybrid electronic-optical network for reducing energy consumption in embedded CMPs
Proceedings of the First International Workshop on Many-core Embedded Systems
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