Register allocation and binding for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
An efficient implementation of a scaling minimum-cost flow algorithm
Journal of Algorithms
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
A matrix synthesis approach to thermal placement
Proceedings of the 1997 international symposium on Physical design
Standard cell placement for even on-chip thermal distribution
ISPD '99 Proceedings of the 1999 international symposium on Physical design
On thermal effects in deep sub-micron VLSI interconnects
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A framework for dynamic energy efficiency and temperature management
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Design Challenges of Technology Scaling
IEEE Micro
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Effective graph theoretic techniques for the generalized low power binding problem
Proceedings of the 2003 international symposium on Low power electronics and design
Microarchitecture level power and thermal simulation considering temperature dependent leakage model
Proceedings of the 2003 international symposium on Low power electronics and design
Dynamic Thermal Management for High-Performance Microprocessors
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Compact thermal modeling for temperature-aware design
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 41st annual Design Automation Conference
A thermal-driven floorplanning algorithm for 3D ICs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Thermal-aware high-level synthesis based on network flow method
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Thermal-induced leakage power optimization by redundant resource allocation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
An integrated approach to thermal management in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
TABS: temperature-aware layout-driven behavioral synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework
Proceedings of the 24th symposium on Integrated circuits and systems design
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Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness of such lower level physical phenomenon in high level synthesis algorithms will help to achieve better designs. In this work, we developed a temperature aware binding algorithm. Switching power of a module correlates with its operating temperature. The goal of our binding algorithm is to distribute the activity evenly across functional units. This approach avoids steep temperature differences between modules on a chip, hence, the occurrence of hot spots. Starting with a switching optimal binding solution, our algorithm iteratively minimizes the maximum temperature reached by the hottest functional unit. Our algorithm does not change the number of resources used in the original binding. We have used HotSpot, a temperature modeling tool, to simulate temperature of a number ASIC designs. Our binding algorithm reduces temperature reached by the hottest resource by 12.21°C on average. Reducing the peak temperature has a positive impact on leakage as well. Our binding technique improves leakage power by 11.89%, and overall power by 3.32% on average at 130nm technology node compared to a switching optimal binding