Empirical evaluation of some high-level synthesis scheduling heuristics
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Register allocation and binding for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
An efficient implementation of a scaling minimum-cost flow algorithm
Journal of Algorithms
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Thermal-Aware Task Allocation and Scheduling for Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Temperature-aware resource allocation and binding in high-level synthesis
Proceedings of the 42nd annual Design Automation Conference
Peak temperature control and leakage reduction during binding in high level synthesis
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
A thermal-driven floorplanning algorithm for 3D ICs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
TAPHS: thermal-aware unified physical-level and high-level synthesis
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Adaptive chip-package thermal analysis for synthesis and design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Design space exploration using time and resource duality with the ant colony optimization
Proceedings of the 43rd annual Design Automation Conference
Thermal-aware high-level synthesis based on network flow method
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Journal of VLSI Signal Processing Systems
Thermal-induced leakage power optimization by redundant resource allocation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Placement of 3D ICs with thermal and interlayer via considerations
Proceedings of the 44th annual Design Automation Conference
Three-dimensional multiprocessor system-on-chip thermal optimization
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
An integrated approach to thermal management in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
High temperature adversely impacts on reliability, performance, and leakage power of ICs. In behavioral synthesis, both resource usage allocation and resource binding influence the final thermal profile. Previous thermal-aware behavioral syntheses only focused on binding, ignoring allocation. This paper proposes thermal-aware behavioral synthesis with resource usage allocation. According to power density and feedbacks from thermal simulation, we allocate the number of resources under area constraint. Our flow effectively controls peak temperature and creates even power densities among resources of "different" and "same" types. Compared to classic behavioral synthesis of peak temperature control, our technique reduces peak temperature by 11.1°C on average with no area overhead and only 1.2 more steps latency overhead.