Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs
Proceedings of the 38th annual Design Automation Conference
Dynamic Thermal Management for High-Performance Microprocessors
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Linearity of bulk-controlled inverter ring VCO in weak and strong inversion
Analog Integrated Circuits and Signal Processing
Emerging yield and reliability challenges in nanometer CMOS technologies
Proceedings of the conference on Design, automation and test in Europe
Dynamic thermal management via architectural adaptation
Proceedings of the 46th Annual Design Automation Conference
Designing an ultralow-voltage phase-locked loop using a bulk-driven technique
IEEE Transactions on Circuits and Systems II: Express Briefs
A 0.0018 mm2 frequency-to-digital-converter-based CMOS smart temperature sensor
Analog Integrated Circuits and Signal Processing
Hotspot: acompact thermal modeling methodology for early-stage VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect thermal modeling for accurate simulation of circuit timing and reliability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Temperature and supply Voltage aware performance and power modeling at microarchitecture level
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System-Level Dynamic Thermal Management for High-Performance Microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, a 0.35 V, 82 pJ/conversion ring oscillator based ultra-low power CMOS all digital temperature sensor is presented for on-die thermal management. We utilize subthreshold circuit operation to reduce power and adopt an all-digital architecture, consisting of only standard digital gates. Additionally, a linearization technique is proposed to correct the nonlinear characteristics of subthreshold MOSFETs. A bulk-driven 1-bit gated digitally controlled oscillator is designed for the temperature sensing node. Also, a 1-bit time-to-digital converter is employed in order to double the fine effective resolution of the sensor. The proposed digital temperature sensor has been designed in a 90-nm regular V T CMOS process. After a two-point calibration, the sensor has a maximum error of 驴0.68 to +0.61 °C over the operating temperature range from 0 to 100 °C, while the effective resolution reaches 0.069 °C/LSB. Under a supply voltage of 0.35 V, the power dissipation is only 820 nW with the conversion rate of 10K samples/s at room temperature. Also, the sensor occupies a small area of 0.003 mm2.