Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
A circuit level implementation of an adaptive issue queue for power-aware microprocessors
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Predictive dynamic thermal management for multimedia applications
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
A Fast, Compact Approximation of the Exponential Function
A Fast, Compact Approximation of the Exponential Function
Picking Statistically Valid and Early Simulation Points
Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques
Hybrid Architectural Dynamic Thermal Management
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Temperature-aware microarchitecture: Modeling and implementation
ACM Transactions on Architecture and Code Optimization (TACO)
A First-Order Superscalar Processor Model
Proceedings of the 31st annual international symposium on Computer architecture
On Estimating Optimal Performance of CPU Dynamic Thermal Management
IEEE Computer Architecture Letters
HybDTM: a coordinated hardware-software approach for dynamic thermal management
Proceedings of the 43rd annual Design Automation Conference
Thermal-aware task scheduling at the system software level
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Thermal response to DVFS: analysis with an Intel Pentium M
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Stochastic modeling of a thermally-managed multi-core system
Proceedings of the 45th annual Design Automation Conference
Compiler-driven register re-assignment for register file power-density and temperature reduction
Proceedings of the 45th annual Design Automation Conference
Analytical results for design space exploration of multi-core processors employing thread migration
Proceedings of the 13th international symposium on Low power electronics and design
A hybrid local-global approach for multi-core thermal management
Proceedings of the 2009 International Conference on Computer-Aided Design
Distributed task migration for thermal management in many-core systems
Proceedings of the 47th Design Automation Conference
An overview of achieving energy efficiency in on-chip networks
International Journal of Communication Networks and Distributed Systems
A workload-adaptive and reconfigurable bus architecture for multicore processors
International Journal of Reconfigurable Computing
Dynamic thermal management for multimedia applications using machine learning
Proceedings of the 48th Design Automation Conference
Analog Integrated Circuits and Signal Processing
A multi-agent framework for thermal aware task migration in many-core systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ThermOS: system support for dynamic thermal management of chip multi-processors
PACT '13 Proceedings of the 22nd international conference on Parallel architectures and compilation techniques
Unified reliability estimation and management of NoC based chip multiprocessors
Microprocessors & Microsystems
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Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques continuously monitor the on-chip processor temperature. Appropriate mechanisms (e.g., dynamic voltage or frequency scaling (DVFS), clock gating, fetch gating, etc.) are engaged to lower the temperature if it exceeds a threshold. However, all these mechanisms incur significant performance penalty. We argue that runtime adaptation of micro-architectural parameters, such as instruction window size and issue width, is a more effective mechanism for DTM. If the architectural parameters can be tailored to track the available instruction-level parallelism of the program, the temperature is reduced with minimal performance degradation. Moreover, synergistically combining architectural adaptation with DVFS and fetch gating can achieve the best performance under thermal constraints. The key difficulty in using multiple mechanisms is to select the optimal configuration at runtime for time varying workloads. We present a novel software-level thermal management framework that searches through the configuration space at regular intervals to find the best performing design point that is thermally safe. The central components of our framework are (1) a neural-network based classifier that filters the thermally unsafe configurations, (2) a fast performance prediction model for any configuration, and (3) an efficient configuration space search algorithm. Experimental results indicate that our adaptive scheme achieves 59% reduction in performance overhead compared to DVFS and 39% reduction in overhead compared to DVFS combined with fetch gating.