A 2-D Forward/Inverse Integer Transform Processor of H.264 Based on Highly-parallel Architecture

Authors:
Liu Ling-zhi;Qiu Lin;Rong Meng-tian;Jiang Li
Affiliations:
Shanghai Jiao Tong University;Shanghai Jiao Tong University;Shanghai Jiao Tong University;Shanghai Jiao Tong University
Venue:
IWSOC '04 Proceedings of the System-on-Chip for Real-Time Applications, 4th IEEE International Workshop
Year:
2004

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Abstract

A design of 2-D forward and inverse integer transform processor is presented, which is suitable for MPEG-4 AVC/H.264 visual profile.The comparability between the forward and inverse transform and the symmetry of their arithmetic have been utilized in architecture.According to this design, 2-D transform is implemented by using duplicated 1-D transform.Parallel register array are used to realize the transpose operation.Under 0.35um technology, the logic gate count is only 3524 when the maximum frequency is more than 120MHz.